Evaluation of epoxy underfill materials for solder flip-chip technology

This paper deals with a method of assembling previously unpackaged silicon ICs on substrates such as printed wiring boards (PWB) in the ''flip-chip'' configuration. In this technology, the gap between the chip and the substrate is filled with an epoxy adhesive consisting of an conventional epoxy resin, curing agent and an inert filler occupying a large volume fraction. The function of the underfill epoxy is twofold: to protect and preserve the solder interconnections from the environment and to couple the chip and the substrate mechanically thereby decreasing excessive strains in the solder joints due to the mismatch in the expansion behavior of the silicon IC and the substrate leading to premature failure by mechanical fatigue. Physical properties of epoxy underfill materials such as glass transition temperature and coefficient of thermal expansion (CTE) were examined. In order to obtain void-free flip-chip assemblies, the flow behavior of epoxy underfill materials was investigated. The relative performance of the epoxy underfill materials were characterized using thermal shock test and temperature-humidity test. Also the effects of board thickness and chip dimension were investigated.