Monolithic Power-Combining Techniques for Watt-Level 2.4-GHz CMOS Power Amplifiers for WLAN Applications

被引:31
|
作者
Afsahi, Ali [1 ,2 ]
Larson, Lawrence E. [3 ]
机构
[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA
[2] Broadcom Corp, San Diego, CA 92127 USA
[3] Brown Univ, Sch Engn, Providence, RI 02912 USA
关键词
CMOS; linearization; power amplifier (PA); power combiner; wireless local area network (WLAN); TRANSFORMER;
D O I
10.1109/TMTT.2013.2238245
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Two monolithic power combining schemes for CMOS power amplifiers (PAs)-distributed LC and current-mode transformer-based-are compared. Fully integrated 2.4-GHz PAs using these techniques were fabricated in a 65-nm standard CMOS technology. From a 3.3-V supply, the distributed-LC combined PA produces a saturated power of 31.5 dBm with peak power-added efficiency (PAE) of 25%. The current-mode transformer-based PA combiner produces 33.5-dBm saturated power with 37.6% peak PAE. With gm-linearization and digital pre-distortion, these PAs transmit 25.5 and 26.4 dBm with -25-dB error vector magnitude for a 54-Mb/s orthogonal frequency division multiplexing signal, respectively.
引用
收藏
页码:1247 / 1260
页数:14
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