Accelerating artificial intelligence with reconfigurable computing

被引:0
|
作者
Cieszewski, Radoslaw [1 ]
机构
[1] Warsaw Univ Technol, Inst Elect Syst, Nowowiejska 15-19, Warsaw, Poland
关键词
FPGA; ASIC; Neural Network; Genetic Algorithm; Expert System; Fuzzy System;
D O I
10.1117/12.2000098
中图分类号
P1 [天文学];
学科分类号
0704 ;
摘要
Reconfigurable computing is emerging as an important area of research in computer architectures and software systems. Many algorithms can be greatly accelerated by placing the computationally intense portions of an algorithm into reconfigurable hardware. Reconfigurable computing combines many benefits of both software and ASIC implementations. Like software, the mapped circuit is flexible, and can be changed over the lifetime of the system. Similar to an ASIC, reconfigurable systems provide a method to map circuits into hardware. Reconfigurable systems therefore have the potential to achieve far greater performance than software as a result of bypassing the fetch-decode-execute operations of traditional processors, and possibly exploiting a greater level of parallelism. Such a field, where there is many different algorithms which can be accelerated, is an artificial intelligence. This paper presents example hardware implementations of Artificial Neural Networks, Genetic Algorithms and Expert Systems.
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页数:8
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