共 50 条
- [2] Express Router Microarchitecture for Triplet-based Hierarchical Interconnection Network [J]. 2012 IEEE 14TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS & 2012 IEEE 9TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (HPCC-ICESS), 2012, : 295 - 302
- [3] SPORT: A shortest path routing algorithm for triplet-based hierarchical interconnection network [J]. Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology, 2013, 33 (01): : 57 - 61
- [4] Intra-inter triplet object interaction mechanism in triplet-based hierarchical interconnection network [J]. Telkomnika - Indonesian Journal of Electrical Engineering, 2013, 11 (07): : 3546 - 3551
- [5] Improving Router Efficiency in Network on Chip Triplet-Based Hierarchical Interconnection Network with Shared Buffer Design [J]. PROCEEDINGS FIFTH INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEMS, MODELLING AND SIMULATION, 2014, : 519 - 523
- [6] TRIPLET-BASED ARCHITECTURE AND ITS PROCESS MIGRATION MECHANISM [J]. PROCEEDINGS OF 2009 INTERNATIONAL CONFERENCE ON MACHINE LEARNING AND CYBERNETICS, VOLS 1-6, 2009, : 2754 - +
- [8] Cluster based dynamic hierarchical algorithm of load balancing [J]. Dongnan Daxue Xuebao, 2008, 5 (752-757):
- [9] A triplet-based computer architecture supporting parallel object computing [J]. 2007 IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES, AND PROCESSORS, 2007, : 192 - 197