Low-noise design criteria for detector readout systems in deep submicron CMOS technology

被引:9
|
作者
Manghisoni, M
Ratti, L
Re, V
Speziali, V
机构
[1] Univ Pavia, Dipartimento Elettr, I-27100 Pavia, Italy
[2] Ist Nazl Fis Nucl, Sez Pavia, I-27100 Pavia, Italy
[3] STMicroelectronics, Studio Microelettron, I-27100 Pavia, Italy
[4] Univ Bergamo, Dipartimento Ingn, I-24044 Dalmine, BG, Italy
关键词
noise; deep submicron; short channel MOSFET; detector readout;
D O I
10.1016/S0168-9002(01)01831-9
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
This paper presents a study of the noise behavior of deep submicron CMOS transistors, in view of applications to analog front-end systems for high granularity detectors. The white component of the noise voltage spectrum, which is most important for fast signal processing, and the 1/f noise contribution are investigated to find low-noise design criteria concerning the choice of the polarity and of the channel length of the preamplifier input device in low-power operating conditions. This analysis is supported by experimental data from noise measurements on CMOS devices belonging to a 0.35 mum process. (C) 2002 Elsevier Science B.V, All rights reserved.
引用
收藏
页码:362 / 366
页数:5
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