Switch-Mode Power Supplies Minimum-Deviation Digital Controller IC for DC-DC Switch-Mode Power Supplies

被引:29
|
作者
Radic, Aleksandar [1 ]
Lukic, Zdravko [1 ]
Prodic, Aleksandar [1 ]
de Nie, Robert H. [2 ]
机构
[1] Univ Toronto, Dept Elect & Comp Engn, Lab Power Management & Integrated Switch Mode Pow, Toronto, ON M5S 3G4, Canada
[2] NXP Semicond, NL-6534 AE Nijmegen, Netherlands
关键词
Digital controller IC; fast response; low-power dc-dc converters; parameter insensitive; BUCK CONVERTER; CURRENT ESTIMATOR; PWM CONTROLLER; CONTROL LAW; FREQUENCY; ARCHITECTURE; HYSTERESIS; VOLTAGE;
D O I
10.1109/TPEL.2012.2227503
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper introduces a hardware-efficient digital controller integrated circuit (IC) for single- and two-phase dc-dc converters that recovers from load transients with virtually minimum possible output voltage deviation. In steady state, the IC behaves as a conventional voltage-mode pulsewidth modulation controller. During load changes, it enters transient suppression mode that utilizes a simple algorithm, requiring no knowledge of the converter parameters and virtually no processing power, to seamlessly recover back to the steady state without exposing components to a high-current stress. To further minimize the area and power consumption of the IC, an asynchronous track-and-hold analog-to-digital converter (ADC) is developed. The ADC utilizes only one preamplifier and four comparators having approximately ten times smaller silicon area and power consumption than a comparable windowed flash ADC. To compensate effects of converter losses and system delays on the controller operation, the IC also incorporates duty ratio correction logic and dual-extreme point-based detection. The entire IC is implemented in a CMOS 0.18-mu m process on a 0.26-mm(2) silicon area, which is comparable to the state-of-the-art analog solutions. The functionality of the controller is tested with both single- and two-phase commercial 12-1.8 V, 500-kHz 60/120-W buck converter power stages. The results demonstrate seamless transition to the steady state with virtually minimum output voltage deviation. For the experimental system, this deviation is about four times smaller than that of a fast PID compensator having a one-tenth of the switching frequency bandwidth.
引用
收藏
页码:4281 / 4298
页数:18
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