Design and implementation of discrete event control systems: A Petri net based hardware approach

This paper presents a methodology for modeling and hardware implementation of discrete event control systems based on the formalism of Petri nets (PN). The control algorithm is initially specified as an executable PN specification which is subsequently compiled directly into a compact machine code and stored in commercially available programmable read only memory (PROM). As an implementation platform, a programmable Petri net based dedicated discrete event controller is proposed. The scalable architecture of the controller is optimized to process PN constructs of all possible classes. A remarkable feature of the proposed architecture is its ability to handle explicit concurrency. The controller exploits hardware-level parallelism to track multiple tokens (control threads) through the net. The performance of the architecture has been verified and benchmarked on the fabricated integrated circuit (IC) prototype of the controller.