System-level BIT false alarm reducing technology based on sensor network time stress analysis and the fault propagation correlation model

Equipment fault propagation and sensor faults are the main causes of false alarms in built-in test (BIT) systems. Hence, the current paper analyses the mechanism of system-level BIT false alarms. The technical process of system-level BIT false alarm recognition is presented. First, sensor damage states are estimated using sensor network time stress data generated during its lifetime. In different damage states, a dual support vector machine (SVM) relevance model is built, it can recognise system-level BIT type II false alarms induced by sensor faults. Subsequently, a fault propagation correlation model of the sensor network is set up. Based on this model, a false alarm recognition method is proposed based on probability reasoning. This method can effectively reduce system-level BIT type I false alarms caused by sensor network fault propagation. Lastly, a case about the helicopter horizon system is studied to validate the proposed technology.