Balanced low input impedances CMOS current comparator

被引：3

作者：

Lin, Chun Wei ^{[1
]}

Lin, Sheng Feng ^{[2
]}

机构：

[1] Natl Yunlin Univ Sci & Technol, Dept Elect Engn, Touliu 64002, Yunlin, Taiwan

[2] Natl Yunlin Univ Sci & Technol, Grad Sch Engn Sci & Technol, Touliu 64002, Yunlin, Taiwan

来源：

IEICE ELECTRONICS EXPRESS | 2012年 / 9卷 / 17期

关键词：

current comparator; input impedance; common-gate structure; common-source feedback;

D O I：

10.1587/elex.9.1378

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a continuous-time current comparator with low input impedance enhancing the accuracy of comparison. The proposed circuit employs low impedance common-gate structures as input stages and further uses common-source feedback structures to enable extremely reduction of input impedances. The input impedances are well designed to be balanced, so that the proposed design can be applied to perform precise comparison between two terminals with tiny varied currents. An implemented chip was fabricated by TSMC 0.35 mu m CMOS process with its input impedances and propagation delay are 66.8 Omega, 66.6 Omega and 2.5 ns respectively while the average power consumption is about 1.64 mW.

引用

页码：1378 / 1383

页数：6

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