A FPGA-based Demonstrator for Safety-Critical Applications

被引：2

作者：

Fibich, Christian ^{[1
]}

Roessler, Peter ^{[1
]}

Tauner, Stefan ^{[1
]}

Matschnig, Martin ^{[2
]}

Taucher, Herbert ^{[2
]}

机构：

[1] Univ Appl Sci Tech Wien, Dept Embedded Syst, Hochstadtpl 6, A-1200 Vienna, Austria

[2] Siemens AG Austria, Corp Technol, Res Grp Elect Design, Siemensstr 90, A-1210 Vienna, Austria

来源：

2017 25TH AUSTROCHIP WORKSHOP ON MICROELECTRONICS (AUSTROCHIP) | 2017年

关键词：

Safety; FPGA; Fault Injection; Faul-tolerant Design; Use Case;

D O I：

10.1109/Austrochip.2017.13

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work presents a demonstrator for safetycritical applications based on a low-cost FPGA platform. The main goal of the demonstrator is to show the features and benefits of a fault-injection tool for FPGAs called FIJI (Fault Injection Instrumenter) that was developed by the authors of this paper. Besides, the demonstrator should illustrate typical sources of hardware/software faults as well as approaches and methods for fault-tolerant design that are commonly applied to modern electronic based systems. Both details of the demonstrator's design as well as implementation results including the overhead on resources caused by the proposed fault-injection logic are presented. The demonstrator is portable to FPGA families of different FPGA vendors and can be implemented by using freeware/open-source design tools. Finally, it is planned that all design data of the demonstrator (including source code and documentation) will be available under an open-source license.

引用

页码：35 / 40

页数：6

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