OPTIMIZING CIC AND FIR FILTER'S COEFFICIENTS IN GC4016 DDC CHAIN

被引:0
|
作者
Okiljevic, Predrag M. [1 ]
Pokrajac, Ivan P. [1 ]
Jelusic, Dragana [2 ]
机构
[1] Vojnotehnicki Inst MO RS, Ratka Resanovica 1, Beograd 11030, Serbia
[2] AMRES Akademska Mreza Srbije, 11120 Beograd, Serbia
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中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
In this paper we simulate Digital Down Converter (DDC), as a chain of CIC and FIR filters, in order to optimize filter's coefficients. The goal is to achieve the widest possible bandwidth with four DDCs that will restrain fake peaks. DDC model is based on the DDC in Graychip's GC4016 Multi-Standard Quad DDC Chip. We use program MATLAB (c) to design and analyse four fixed-point DDC filter chains for a WB (Wide Band) application.
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页码:756 / 759
页数:4
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