A simple, high performance TFSOI complementary BiCMOS technology for low power wireless applications

This brief describes a simple, high performance thin-film silicon-on-insulator (TFSOI) complementary BiCMOS (C-BiCMOS) technology, which can be used in low power wireless communication applications. In this technology, a novel, high performance lateral BJT structure is implemented using a gate spacer to obtain a thin base width and a minimum base linkage to the external base for minimized base resistance. A lateral NPN transistor (with maximum oscillation frequency (f(max)) of 29 GHz, cut-off frequency (f(T)) of 8 GHz, current gain (h(FE)) of 78, and collect-emitter breakdown voltage with base open (BVCEO) of 5 V), a lateral PNP transistor (h(FE) of 51 and BVCEO of 4.5 V), and NMOS and PMOS transistors (0.5 mum channel length and 5 mum channel width, 0.5/ - 0.8 V threshold voltage) are fabricated. This technology provides very promising low power, low cost, and high performance solutions for RF mixed-signal system-on-a-chip (SOC) applications.