MADES FP7 EU Project: Effective High Level SysML/MARTE Methodology for Real-Time and Embedded Avionics Systems

被引:0
|
作者
Quadri, Imran R.
Brosse, Etienne
Gray, Ian
Matragkas, Nicholas
Indrusiak, Leandro Soares
Rossi, Matteo
Bagnato, Alessandra
Sadovykh, Andrey
机构
关键词
Model Driven Engineering; UML; MARTE; SysML; Real-Time and Embedded Systems; FPGAs; Synthesis;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The paper presents the EU funded MADES FP7 project, that aims to develop an effective model driven methodology to evolve current practices for the development of real time embedded systems for avionics and surveillance industries. In MADES, we propose an effective SysML/MARTE language subset and have developed new tools and technologies that support high level design specifications, validation, simulation and automatic code generation, while integrating aspects such as component re-use. The paper first illustrates the MADES methodology by means of a car collision avoidance system case study, followed by the underlying MADES language design phases and tool set which enable verification and automatic code generation aspects, hence enabling implementation in execution platforms such as state of the art FPGAs.
引用
收藏
页数:8
相关论文
共 18 条
  • [1] ENOSYS FP7 EU Project: An Integrated Modeling and Synthesis Flow for Embedded Systems Design.
    Brosse, Etienne
    Quadri, Imran R.
    Sadovykh, Andrey
    Ieromnimon, Frank
    Kritharidis, Dimitrios
    Catrou, Rafael
    Sarlotte, Michel
    [J]. 2012 7TH INTERNATIONAL WORKSHOP ON RECONFIGURABLE AND COMMUNICATION-CENTRIC SYSTEMS-ON-CHIP (RECOSOC), 2012,
  • [2] Towards a traceability model in a MARTE-based methodology for real-time embedded systems
    Le Dang, Hung
    Dubois, Hubert
    Gerard, Sebastien
    [J]. INNOVATIONS IN SYSTEMS AND SOFTWARE ENGINEERING, 2008, 4 (03) : 189 - 193
  • [3] Towards a traceability model in a MARTE-based methodology for real-time embedded systems
    Hung Le Dang
    Hubert Dubois
    Sébastien Gérard
    [J]. Innovations in Systems and Software Engineering, 2008, 4 (3) : 189 - 193
  • [4] Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project
    Posadas, Hector
    Nicolas, Alejandro
    Penil, Pablo
    Villar, Eugenio
    Broekaert, Florian
    Bourdelles, Michel
    Cohen, Albert
    Lazarescu, Mihai T.
    Lavagno, Luciano
    Terechko, Andrei
    Glassee, Miguel
    Prieto, Manuel
    [J]. MICROPROCESSORS AND MICROSYSTEMS, 2014, 38 (08) : 960 - 975
  • [5] EU FP7-288307 PHARAON project Parallel and heterogeneous architecture for real-time applications
    Posadas, Hector
    Villar, Eugenio
    Broekaert, Florian
    Bourdelles, Michel
    Cohen, Albert
    Pop, Antoniu
    Nhat Minh Le
    Guatto, Adrien
    Lazarescu, Mihai T.
    Lavagno, Luciano
    Terechko, Andrei
    Glassee, Miguel
    Calvo, Daniel
    de las Heras, Edouardo
    [J]. 16TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2013), 2013, : 371 - 378
  • [6] System-level design based on UML/MARTE for FPGA-based embedded real-time systems
    Marcela Leite
    Marco Aurélio Wehrmeister
    [J]. Design Automation for Embedded Systems, 2016, 20 : 127 - 153
  • [7] System-level design based on UML/MARTE for FPGA-based embedded real-time systems
    Leite, Marcela
    Wehrmeister, Marco Aurelio
    [J]. DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, 2016, 20 (02) : 127 - 153
  • [8] A Methodology for Mapping SysML Activity Diagram to Time Petri Net for Requirement Validation of Embedded Real-Time Systems with Energy Constraints
    Andrade, Ermeson
    Maciel, Paulo
    Callou, Gustavo
    Nogueira, Bruno
    [J]. THIRD INTERNATIONAL CONFERENCE ON DIGITAL SOCIETY: ICDS 2009, PROCEEDINGS, 2009, : 266 - 271
  • [9] Testing real-time embedded systems using high level architecture
    Junior, Jose Claudio V. S.
    Brito, Alisson V.
    Silva Costa, Luis Feliphe
    Nascimento, Tiago P.
    Kurt Melcher, Elmar Uwe
    [J]. DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, 2016, 20 (04) : 289 - 309
  • [10] Testing real-time embedded systems using high level architecture
    Jose Claudio V. S. Junior
    Alisson V. Brito
    Luis Feliphe Silva Costa
    Tiago P. Nascimento
    Elmar Uwe Kurt Melcher
    [J]. Design Automation for Embedded Systems, 2016, 20 : 289 - 309