Integer multipliers with overflow detection

被引：9

作者：

Gok, Mustafa ^{[1
]}

Schulte, Michael J.

Arnold, Mark G.

机构：

[1] Cukurova Univ, TR-01330 Adana, Turkey

[2] Univ Wisconsin, Madison, WI 53706 USA

[3] Lehigh Univ, Bethlehem, PA 18015 USA

来源：

IEEE TRANSACTIONS ON COMPUTERS | 2006年 / 55卷 / 08期

关键词：

computer arithmetic; high-speed arithmetic algorithms; combinational logic; overflow detection; multiplication;

D O I：

10.1109/TC.2006.126

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a general approach for designing array and tree integer multipliers with overflow detection. The overflow detection techniques are based on an analysis of the magnitudes of the input operands. The overflow detection circuits operate in parallel with a simplified multiplier to reduce the overall area and delay.

引用

页码：1062 / 1066

页数：5

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