Traffic Analysis for Triplet-based Networks Based on Full-system Simulation

Most CMPs use on-chip networks to connect cores and tend to integrate more cores on a single die. As the number of cores increases, on-chip networks will play an important role in the performance of future CMPs. Due to its low area cost, triplet-based network is a good choice for the designers of CMPs. In this paper, we analyze the traffic in the terms of latency and link load. Our models for 9-node triplet-based network shows that the link load distributes unevenly: some links' load is nearly 2 times than that of other. Our modes also show that, if we can exploit traffic locality, the network latency is reduced significantly with the link load distributed more evenly. We run multithreaded commercial benchmarks on multi-core simulator GEMS to generate practical traffics and simulate these traffics on network simulator Garnet. Experiment results show that the traffic locality really reduces the network latency significantly. Besides, the average network latency also benefits from the reduced congestion.