共 50 条
- [1] On Finding the Optimal Number of Decoupling Capacitors by Minimizing the Equivalent Inductance of the PCB PDN [J]. 2014 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC), 2014, : 218 - 223
- [2] A Modified Genetic Algorithm for the Selection of Decoupling Capacitors in PDN Design [J]. 2021 JOINT IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SIGNAL & POWER INTEGRITY, AND EMC EUROPE (EMC+SIPI AND EMC EUROPE), 2021, : 712 - 717
- [3] Genetic Algorithm PDN Optimization based on Minimum Number of Decoupling Capacitors Applied to Arbitrary Target Impedance [J]. 2020 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY AND SIGNAL & POWER INTEGRITY VIRTUAL SYMPOSIUM(IEEE EMC+SIPI), 2020, : 428 - 433
- [4] Analysis and Design of the Interposer PDN With Optimal Arrangement of Decoupling Capacitors [J]. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2024, 14 (02): : 291 - 299
- [6] Optimization of PDN decoupling capacitors for EMI Reduction based on Deep Reinforcement Learning [J]. 2021 JOINT IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SIGNAL & POWER INTEGRITY, AND EMC EUROPE (EMC+SIPI AND EMC EUROPE), 2021, : 59 - 63
- [9] Analysis on Optimal Chip Floorplanning Considering Various Types of Decoupling Capacitors in Package PDN [J]. IEEE 72ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2022), 2022, : 2091 - 2094