Mask split algorithm for stencil mask in electron projection lithography

被引:17
|
作者
Yamashita, H
Takeuchi, K
Masaoka, H
机构
[1] NEC Corp Ltd, ULSI Device Dev Div, Kanagawa 2291198, Japan
[2] ISS Corp, Tokyo 1920904, Japan
来源
关键词
D O I
10.1116/1.1412897
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We developed a mask split algorithm, "M-Split," using some theories of computational geometry. First, we determined which patterns to split based on actual stencil mask fabrication and defined singular patterns. These singular patterns consisted of nonconvex polygons and could be identified by computational geometry. The contoured singular patterns were then split into two complementary masks, balancing the pattern area density. The split resulted in an 80 nm design-rule logic device, showing that the original patterns could be completely split into polygons that could safely fabricate a stencil mask with a pattern area balance of 50.00% between two complementary masks. The ratio of increase of polygons caused by splitting was 4.84. The computational time without contouring and data output for one 1-mm-square sub field on a 4X mask was 14.2 s for the logic device. (C) 2001 American Vacuum Society.
引用
收藏
页码:2478 / 2482
页数:5
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