A Just-in-Time Customizable Processor

被引：0

作者：

Chen, Liang ^{[1
]}

Tarango, Joseph ^{[2
]}

Mitra, Tulika ^{[1
]}

Brisk, Philip ^{[2
]}

机构：

[1] Natl Univ Singapore, Sch Comp, Singapore 117548, Singapore

[2] Univ Calif Riverside, Dept Comp Sci & Engn, Riverside, CA 92521 USA

来源：

2013 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD) | 2013年

基金：

美国国家科学基金会;

关键词：

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

A traditional extensible processor with customized circuits achieves high performance at the cost of flexibility, while a dynamically extensible processor with reconfigurable fabric offers flexibility for instruction-set extensions (ISEs) but suffers from computational inefficiency. We introduce a novel architecture called Just-in-Time Customizable (JiTC) processor that reconciles the conflicting demands of performance and flexibility in extensible processors. Our key innovation is a multi-stage accelerator, called Specialized Functional Unit (SFU), that is tightly integrated in the processor pipeline. The SFU design is derived through a systematic study of a large range of representative embedded applications. The SFU can be reconfigured on per-cycle basis to support different application-specific instructions at near-ideal performance of an extensible processor. We also provide an automated compilation tool chain for JiTC processor. The experimental results confirm the efficiency and applicability of our approach.

引用

页码：524 / 531

页数：8

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