A novel nonvolatile memory cell for programmable logic

被引：2
|
作者：
Lin, H [1 ]
Tiwari, S [1 ]
机构：
[1] Cornell Univ, Ithaca, NY 14853 USA
来源：
2005 IEEE International SOI Conference, Proceedings | 2005年
关键词：
D O I：
10.1109/SOI.2005.1563590
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A novel, simple and bipolar-injection based nonvolatile field-effect memory cell is demonstrated in silicon-on-insulator CMOS technology. Programming time down to 8 ns are achieved together with erase times of a milli-second. The characteristics, compactness and compatiblity with CMOS processes suggest suitability of the structure for embedded programmable and reprogrammable applications, and extenisble to 3D applications. This extended abstract summarizes the technology and experimental characteristics of the device.
引用
收藏
页码：208 / 210
页数：3
相关论文
共 50 条
  • [1] Logic-in-Memory With a Nonvolatile Programmable Metallization Cell
    Junsangsri, Pilin
    Han, Jie
    Lombardi, Fabrizio
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 24 (02) : 521 - 529
  • [2] An SRAM cell with nonvolatile memory for programmable logic applications
    Wright, PJ
    Madurawe, RU
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (06) : 918 - 919
  • [3] Nonvolatile Multifunctional Programmable Spin Logic Cell
    HAN Xiufeng
    BulletinoftheChineseAcademyofSciences, 2017, 31 (02) : 96 - 98
  • [4] Nonvolatile memory and programmable logic from molecule-gated nanowires
    Duan, XF
    Huang, Y
    Lieber, CM
    NANO LETTERS, 2002, 2 (05) : 487 - 490
  • [5] A verification of nonvolatile programmable logic device
    Li, Ying
    Ding, Yiqing
    Liu, Xin
    Yan, Jiefeng
    Lin, Yinyin
    Tang, Tingao
    INTEGRATED FERROELECTRICS, 2007, 89 : 62 - 68
  • [6] Recent progress of nonvolatile, multifunctional and programmable spin logic
    Han Xiu-Feng
    Wan Cai-Hua
    ACTA PHYSICA SINICA, 2018, 67 (12)
  • [7] Electrically programmable nonvolatile memory in CMOS technology
    Ermakov I.V.
    Shelepin N.A.
    Russian Microelectronics, 2015, 44 (7) : 449 - 452
  • [8] First Demonstration of Logic Mapping on Nonvolatile Programmable Cell Using Complementary Atom Switch
    Miyamura, M.
    Tada, M.
    Sakamoto, T.
    Banno, N.
    Okamoto, K.
    Iguchi, N.
    Hada, H.
    2012 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2012,
  • [9] Nonvolatile configuration memory cell for low power field programmable gate array
    Yasuda S.
    Ikegami K.
    Tanamoto T.
    Kinoshita A.
    Abe K.
    Fujita S.
    2011 3rd IEEE International Memory Workshop, IMW 2011, 2011,
  • [10] NONVOLATILE, NDRO, ARRAY LOGIC MEMORY CELL IN JOSEPHSON TECHNOLOGY.
    Terlep, K.D.
    IBM Technical Disclosure Bulletin, 1974, 17 (03): : 890 - 891
12345