Negative Bias Temperature Instability for P-channel of LTPS Thin Film Transistors with Fluorine Implantation

被引：0

作者：

Kao, Chyuan-Haur ^{[1
]}

Sung, W. H. ^{[1
]}

机构：

[1] Chang Gung Univ, Tao Yuan 333, Taiwan

来源：

AMORPHOUS AND POLYCRYSTALLINE THIN-FILM SILICON SCIENCE AND TECHNOLOGY-2008 | 2008年 / 1066卷

关键词：

D O I：

暂无

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

This paper studies the impact of LTPS (low temperature polycrystalline silicon) TFTs with fluorine implantation under NBTI (Negative bias temperature instability) stress. The fluorinated TFTs' devices can obtain better characteristics with samller threshold voltage shifts lower trap states and lower subthreshold swing variation. Therefore, the fluorine implantation does not only improve initial electrical characteristics, but also suppresses the NBTI-induced degradation.

引用

页码：367 / 372

页数：6

共 50 条

[1] Effect of fluorine implantation on recovery characteristics of p-channel MOSFET after negative bias temperature instability stress
Oh, Sun-Ho
Kwon, Hyuk-Min
Kwon, Sung-Kyu
Sung, Seung-Yong
Yu, Jae-Nam
Lee, Ga-Won
Lee, Hi-Deok
[J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2014, 53 (08) : 14 - 17
[2] Comprehensive study on dynamic bias temperature instability of p-channel polycrystalline silicon thin-film transistors
Huang, C. -F.
Yang, Y. -J.
Peng, C. -Y.
Sun, H. -C.
Liu, C. W.
Chao, C. -W.
Lin, K. -C.
[J]. 2007 INTERNATIONAL SEMICONDUCTOR DEVICE RESEARCH SYMPOSIUM, VOLS 1 AND 2, 2007, : 638 - +
[3] Dynamic negative bias temperature instability (NBTI) of low-temperature polycrystalline silicon (LTPS) thin-film transistors
Liao, J. C.
Fang, Y. K.
Kao, C. H.
Cheng, C. Y.
[J]. IEEE ELECTRON DEVICE LETTERS, 2008, 29 (05) : 477 - 479
[4] A New Method for Negative Bias Temperature Instability Assessment in P-Channel Metal Oxide Semiconductor Transistors
Djezzar, Boualem
Tahi, Hakim
Benabdelmoumene, Abdelmadjid
Chenouf, Amel
Kribes, Youcef
[J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2012, 51 (11)
[5] Negative bias temperature instability mechanisms in p-channel power VDMOSFETs
Stojadinovic, N
Dankovic, D
Djoric-Veljkovic, S
Davidovic, V
Manic, I
Golubovic, S
[J]. MICROELECTRONICS RELIABILITY, 2005, 45 (9-11) : 1343 - 1348
[6] Impact of nitrogen on negative bias temperature instability in p-channel MOSFETs
Houssa, M
Parthasarathy, C
Espreux, N
Autran, JL
Revil, N
[J]. ELECTROCHEMICAL AND SOLID STATE LETTERS, 2003, 6 (12) : G146 - G148
[7] Negative-bias-temperature-instability and hot carrier effects in nanowire junctionless p-channel multigate transistors
Park, Jong Tae
Kim, Jin Young
Colinge, Jean Pierre
[J]. APPLIED PHYSICS LETTERS, 2012, 100 (08)
[8] Dynamic Bias Instability of p-Channel Polycrystalline-Silicon Thin-Film Transistors Induced by Impact Ionization
Huang, Ching-Fang
Sun, Hung-Chang
Yang, Ying-Jhe
Chen, Yen-Ting
Ku, Chun-Yuan
Liu, Chee Wee
Hsu, Yuan-Jun
Shih, Ching-Chieh
Chen, Jim-Shone
[J]. IEEE ELECTRON DEVICE LETTERS, 2009, 30 (04) : 368 - 370
[9] Abnormal Threshold Voltage Shifts in P-Channel Low-Temperature Polycrystalline Silicon Thin Film Transistors Under Negative Bias Temperature Stress
Kim, Sang Sub
Choi, Pyung Ho
Baek, Do Hyun
Lee, Jae Hyeong
Choi, Byoung Deog
[J]. JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, 2015, 15 (10) : 7555 - 7558
[10] Room temperature deposited transparent p-channel CuO thin film transistors
Sanal, K. C.
Vikas, L. S.
Jayaraj, M. K.
[J]. APPLIED SURFACE SCIENCE, 2014, 297 : 153 - 157

← 1 2 3 4 5 →