T1/E1/J1 receiver in CMOS

Behavioural model, simulation and testing results of a mixed-signal short-/long-haul receiver suitable for high-speed T1/E1/J1 application in CMOS are presented. The measured results demonstrate successful recovery of distorted incoming signals attenuated from 0 to 44 dB (max). The mixed-signal part of the receiver chip occupies area of 1.2 mm x 1.8 mm in CMOS 0.35 mu m process and requires typically 120 mW of power at 3.3 V power supply. Digital framer supports the operation of the receiver whereas local RAM is used for storing the unshielded twisted pair cable models that can be easily reprogrammed. Copyright (C) 2008 John Wiley & Sons, Ltd.