A new common-mode voltage reduction technique for multilevel inverters

被引：0
|
作者：
Ghoreishy, Hoda [1 ]
Zare, Firuz [2 ]
Hassanpour, Hamid [1 ,3 ]
Ledwich, Gerard [2 ]
机构：
[1] Babol Univ Tech, Dept Comp & Elect Engn, POB 47144, Babol Sar, Iran
[2] Queensland Univ Technol, Sch Engn Syst, Brisbane, Qld, Australia
[3] Univ Babol, Dept Elect & Comp Engn, Babol, Iran
来源：
2007 AUSTRALASIAN UNIVERSITIES POWER ENGINEERING, VOLS 1-2 | 2007年
关键词：
common-mode voltage (CMV); multilevel inverters; pulse width modulation (PWM);
D O I：
暂无
中图分类号：
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号：
0807 ; 0820 ;
摘要：
In this paper, a novel common-mode voltage reduction technique is proposed for a three-phase multilevel inverter. The technique can he used to control capacitors voltages and load currents with low switching losses. It can be applied to a three-phase three-level inverter with the flying capacitor topology. One of the advantages of this method is that the technique can be applied to more voltage levels without significantly changing the control algorithm. The simulation results of a five-level inverter in this paper indicate that the proposed technique can be used to implement a multilevel inverter.
引用
收藏
页码：36 / +
页数：3
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