VLSI Friendly ECG QRS Complex Detector for Body Sensor Networks

被引：29

作者：

Zhang, Chris F. ^{[1
]}

Bae, Tae-Wuk ^{[2
]}

机构：

[1] Carnegie Mellon Univ, Dept Elect & Comp Engn, Pittsburgh, PA 15213 USA

[2] Stanford Univ, Stanford Ctr Image Syst Engn, Stanford, CA 94305 USA

来源：

IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS | 2012年 / 2卷 / 01期

关键词：

Body sensor networks (BSNs); electrocardiogram (ECG) sensor; field-programmable gate array (FPGA); mathematical morphology; QRS detection; very-large-scale integration (VLSI) architecture;

D O I：

10.1109/JETCAS.2012.2187706

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper aims to present a very-large-scale integration (VLSI) friendly electrocardiogram (ECG) QRS detector for body sensor networks. Baseline wandering and background noise are removed from original ECG signal by a mathematical morphological method. Then the multipixel modulus accumulation is employed to act as a low-pass filter to enhance the QRS complex and improve the signal-to-noise ratio. The performance of the algorithm is evaluated with standard MIT-BIH arrhythmia database and wearable exercise ECG Data. Corresponding power and area efficient VLSI architecture is designed and implemented on a commercial nano-FPGA. High detection rate and high speed demonstrate the effectiveness of the proposed detector.

引用

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页码：52 / 59

页数：8

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