Efficient constraint extraction for template-based processor self-test generation

被引:0
|
作者
Kambe, K [1 ]
Iwagaki, T [1 ]
Inoue, M [1 ]
Fujiwara, H [1 ]
机构
[1] Nara Inst Sci & Technol, Grad Sch Informat Sci, Kansai Sci City 6300192, Japan
关键词
D O I
10.1109/ATS.2005.52
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents efficient method to extract constraints from a test program template and synthesize a test program using constraint circuits. A test program template is an instruction sequence with unspecified operands, and represents paths for justification of test patterns and observation of test responses for a module under rest (MUT). The constraint circuit represents a relation between operand values and inputs/output of the MUT therefore it enables to obtain operand values using a standard automatic test pattern generator. Experimental results show that the proposed method generates accurate and compact constraint circuits, and we obtain high fault efficiency.
引用
收藏
页码:444 / 447
页数:4
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