共 50 条
- [1] Evolution of organic chip packaging technology for high speed applications IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2004, 27 (01): : 4 - 9
- [2] ASIC packaging challenges with high speed interfaces IEEE EDAPS: 2008 ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM, 2008, : 20 - 23
- [3] ADVANCED TECHNOLOGY FOR HIGH-SPEED PACKAGING PROCEEDINGS OF THE TECHNICAL CONFERENCE : NINTH ANNUAL INTERNATIONAL ELECTRONICS PACKAGING CONFERENCE, VOLS 1 AND 2, 1989, : 721 - 724
- [4] Electronic chip mounting and high density packaging technology JEE. Journal of electronic engineering, 1988, 25 (262): : 38 - 40
- [5] Multi-chip packaging for high speed superconducting circuits IEEE Trans Appl Supercond, 2 pt 3 (3160-3163):
- [6] Packaging technology for thin, high density and high speed devices Hitachi Review, 1991, 40 (01): : 51 - 56
- [8] Adhesion and toughening mechanisms at underfill interfaces for flip-chip-on-organic-substrate packaging IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, 2000, 23 (01): : 117 - 127
- [9] An off-chip ESD protection for high-speed interfaces 2015 37TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2015,
- [10] PACKAGING TECHNOLOGY FOR MICROWAVE ICS AND HIGH-SPEED LOGIC ISSCC DIGEST OF TECHNICAL PAPERS, 1982, 25 : 218 - 219