Efficient RF/microwave modeling of discontinuities in chip packages and boards

A methodology for efficient modeling of discontinuities in chip packages and boards at RF/microwave frequencies is discussed. It commences with a novel approach for defining the boundaries of all geometrical discontinuities in chip packages and boards, because defining the boundaries of discontinuities ensures efficient R-F/microwave modeling and measurement of the discontinuities themselves as well as the chip packages and boards in which they are found. It also leads to a reduction in the cost of fabrication of test structures needed for their characterization. Based on the 3D full wave electromagnetic (EM) field computation results of the discontinuities, their electrical parameters were extracted. To validate the modeling technique, test structures were designed, fabricated and measured. A good correlation was obtained between the computed and measured results.