A 60 GHz Power Amplier Using High Common-Mode Rejection Technique

被引：0

作者：

Minami, Ryo ^{[1
]}

Bunsen, Keigo ^{[1
]}

Okada, Kenichi ^{[1
]}

Matsuzawa, Akira ^{[1
]}

机构：

[1] Tokyo Inst Technol, Dept Phys Elect, Meguro Ku, Tokyo 1528552, Japan

来源：

2012 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC 2012) | 2012年

关键词：

60; GHz; CMRR; Power ampliers; CMOS;

D O I：

暂无

中图分类号：

TN [电子技术、通信技术];

学科分类号：

0809 ;

摘要：

This paper proposes the method of realization of high common-mode rejection ratio(CMRR) at 60 GHz. High CMRR can compensate the differential mismatch. In the proposed method, virtual ground for differential-mode and LC peaking for common-mode are utilized. To confirm the effect of this technique, the 2-stage differential power amplier is fabricated in a 65nm CMOS process. It achieves a CMRR of 26 dB, a power gain of 12.1 dB, a peak PAE of 11.1 %, a P-sat of 9.0 dBm, a power consumption of 45.8mW from a 1.0V power supply.

引用

页码：10 / 12

页数：3

共 50 条

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[J]. ELECTRONIC ENGINEERING, 1983, 55 (680): : 29 - 29
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