A Multi Gigabit FPGA-based 5-tuple classification system

Packet classification is one of the most important enabling technologies for next generation network services. Even though many multi-dimensional classification algorithms have been proposed, most of them are precluded from commercial equipments due to their high memory requirements. In this paper, we present an efficient packet classification scheme, called Dual Stage Bloom Filter classification Engine (2sBFCE). 2sBFC comprises of an innovative 5-field search scheme that decomposes multi-field classification rules into internal single-field rules which are combined using multi-level loom filters. The design of 2sBFCE is optimized for the common use based on analysis of real world classification databases. The hardware implementation of this scheme handles 4K rules while supporting network streams at a rate of 2Gbps even in the worst case, and more than 6Gbps in the average case when implemented in an off-the-shelf FPGA.