Formal verification of PowerPC(TM) arrays using symbolic trajectory evaluation

被引：10
|
作者：
Pandey, M [1 ]
Raimi, R [1 ]
Beatty, DL [1 ]
Bryant, RE [1 ]
机构：
[1] CARNEGIE MELLON UNIV,SCH COMP SCI,PITTSBURGH,PA 15213
来源：
33RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 1996 | 1996年
关键词：
D O I：
10.1109/DAC.1996.545655
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：649 / 654
页数：6
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