Parallel simulation of deep sub-micron double-gate metal-oxide-semiconductor field effect transistors

Drift-Diffusion Density Gradient model (DD-DG) is the most popular model for simulating carrier transport phenomena in sub-micron semiconductor device, especially in two- or three-dimensional space. In deep sub-micron regime, the width effects cannot be neglected while simulating, i.e., three-dimensional simulation must be considered. However, three-dimensional computing is time-consuming. Fortunately, the dilemma of time consuming or rough approximation can be overcame by advanced computing technique. In this paper, we employ a parallel direct solving method to simulate double-gate metal-oxide-semiconductor field effect transistors (DG-MOSFET). The computational benchmarks of the parallel simulation, parallel speedup, load balance, and efficiency are studied in this work. Parallel numerical simulation of semiconductor devices is shown to be an indispensable tool for fast characterization and optimal design of semiconductor devices.