A Novel 32x1 Readout Integrated Circuit with High Dynamic Range for IRFPA

In this paper, a novel 32x1 ROIC with high dynamic range is presented. The ROIC contains a capacitive trans-impedance input amplifier (CTIA integrator), followed by a comparator that set a threshold voltage for comparing the integrating signal. It contains the time-to-threshold information in adding additional dynamic range with a linear voltage ramp input, in addition to the regular integration signal. By the end of integration, if the integration signal is less than the threshold voltage, the integration signal is sampled for readout. When the integrating signal is reached to the threshold voltage before the end of integration, the ramping voltage is stored and later sampled for readout in representing the signal level and a digital flag is set in recording the event of trigger. Thus, a high level signal can be saved before it saturating the integrator. A test chip of 32x1 ROIC is designed and fabricated with 0.35 mu m triple metal, double poly CMOS technology. The chip test results prove correct function of the circuit with 3.3 V power supply. The results of tracing one channel show that the dynamic range increases 54 dB with a 10-bit ADC and the readout clock frequency is up to 10 MHz.