An FPGA-based infant monitoring system

被引：4
|
作者：
Dickinson, P [1 ]
Appiah, K [1 ]
Hunter, A [1 ]
Ormston, S [1 ]
机构：
[1] Lincoln Univ, Dept Comp & Informat, Lincoln LN6 7TS, England
来源：
FPT 05: 2005 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS | 2005年
关键词：
D O I：
10.1109/FPT.2005.1568578
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We have designed an automated visual surveillance system for monitoring sleeping infants. The low-level image processing is implemented on an embedded Xilinx's Virtex II XC2v6OOO FPGA and quantifies the level of scene activity using a specially designed background subtraction algorithm. We present our algorithm and show how we have optimised it for this platform.
引用
收藏
页码：315 / 316
页数：2
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