NLDMOS ESD Scaling Under Human Metal Model for 40-V Mixed-Signal Applications

被引:5
|
作者
Malobabic, Slavica [1 ]
Salcedo, Javier A. [2 ]
Hajjar, Jean-Jacques [2 ]
Liou, Juin J. [1 ]
机构
[1] Univ Cent Florida, Dept Elect Engn & Comp Sci, Orlando, FL 32816 USA
[2] Analog Devices Inc, Corp ESD, Wilmington, MA 01887 USA
关键词
Electrostatic discharge (ESD); human metal model (HMM); laterally diffused MOS (LDMOS);
D O I
10.1109/LED.2012.2213574
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Electrostatic discharge (ESD) robustness of LDMOS (laterally diffused MOS) devices is found to be highly dependent on the type of ESD stress. In particular, the device's ESD robustness does not scale with the device width, and this condition is substantially aggravated during the International Electrotechnical Commission (IEC) 61000-4-2 stress condition. IEC 61000-4-2 is a system-level ESD standard increasingly being adopted in the industry for ESD robustness assessment at the integrated circuit level. A comprehensive evaluation under the IEC 61000-4-2 stress impacting precision circuit designs is introduced in this letter for variable width LDMOS devices fabricated in a 0.18-mu m bipolar-CMOS-DMOS process for 40-V mixed-signal applications.
引用
收藏
页码:1595 / 1597
页数:3
相关论文
共 11 条
  • [1] A FULLY COMPLEMENTARY BICMOS TECHNOLOGY FOR 10 V MIXED-SIGNAL CIRCUIT APPLICATIONS
    ITO, A
    CHURCH, MD
    RHEE, CS
    JOHNSTON, JM
    GASNER, JT
    LIGON, WA
    BEGLEY, PA
    DEJONG, GA
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (07) : 1149 - 1160
  • [2] Design and Analysis of Full-Chip HV ESD Protection in BCD30V for Mixed-Signal ICs
    Wang, Shijun
    Yao, Fai
    Wang, Li
    Ma, Rui
    Zhang, C.
    Dong, Z. Y.
    Wang, Albert
    Shi, Zitao
    Cheng, Yuhua
    Chi, Baoyong
    Ren, Tianling
    2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2013, : 1059 - 1062
  • [3] A physical compact model of DG MOSFET for mixed-signal circuit applications - Part I: Model description
    Pei, G
    Ni, WP
    Kammula, AV
    Minch, BA
    Kan, ECC
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (10) : 2135 - 2143
  • [4] Transition Metal Dichalcogenide-Based Field-Effect Transistors for Analog/Mixed-Signal Applications
    Rawat, Brajesh
    Vinaya, M. M.
    Paily, Roy
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (05) : 2424 - 2430
  • [5] A physical compact model of DG MOSFET for mixed-signal circuit applications - Part II: Parameter extraction
    Pei, G
    Kan, ECC
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (10) : 2144 - 2153
  • [7] Design and simulation of GaN devices and integrated circuits using ASM compact HEMT model for mixed-signal applications
    Lu, Shenkai
    Chen, Kaiwen
    Liu, Jiabao
    Cui, Pengju
    Li, Ang
    Liu, Wen
    2022 19TH CHINA INTERNATIONAL FORUM ON SOLID STATE LIGHTING & 2022 8TH INTERNATIONAL FORUM ON WIDE BANDGAP SEMICONDUCTORS, SSLCHINA: IFWS, 2022, : 61 - 64
  • [8] Bulk and Interface effects on voltage linearity of ZrO2-SiO2 multilayered metal-insulator-metal capacitors for analog mixed-signal applications
    Park, S. D.
    Park, C.
    Gilmer, D. C.
    Park, H. K.
    Kang, C. Y.
    Lim, K. Y.
    Burham, C.
    Barnett, J.
    Kirsch, P. D.
    Tseng, H. H.
    Jammy, R.
    Yeom, G. Y.
    APPLIED PHYSICS LETTERS, 2009, 95 (02)
  • [9] High performance super self-aligned 3 V/5 V BiCMOS technology with extremely low parasitics for low-power mixed-signal applications
    AT&T Bell Lab, Holmdel, United States
    IEEE Trans Electron Devices, 3 (513-522):
  • [10] A HIGH-PERFORMANCE SUPER SELF-ALIGNED 3-V/5-V BICMOS TECHNOLOGY WITH EXTREMELY LOW PARASITICS FOR LOW-POWER MIXED-SIGNAL APPLICATIONS
    SUNG, JM
    CHIU, TY
    LAU, K
    LIU, TM
    ARCHER, VD
    RAZAVI, B
    SWARTZ, RG
    ERCEG, FM
    GLICK, JT
    HOWER, GR
    KRAFTY, SA
    LADUCA, AJ
    LING, MP
    MOERSCHEL, KG
    POSSANZA, WA
    PROZONIC, MA
    LONG, TP
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1995, 42 (03) : 513 - 522