Single-phase 9-level hybridised cascaded multilevel inverter

被引:54
|
作者
Odeh, Charles I. [1 ]
Nnadi, Damian B. N. [1 ]
机构
[1] Univ Nigeria, Dept Elect Engn, Nsukka, Nigeria
关键词
FLYING-CAPACITOR; MULTICARRIER PWM; CONVERTERS; REDUCTION; ALGORITHM; DESIGN; BREED;
D O I
10.1049/iet-pel.2012.0199
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study proposes a single-phase, 9-level, cascade multilevel inverter topology. The multicarrier, phase disposition pulse width modulation scheme is employed to generate the gating signals for the power switches. Operational principles with switching functions are given. By controlling the modulation index, the desired number of levels: 3, 5, 7 and 9, of the inverter's output voltage can be achieved. For modulation indices of: 0.24, 0.4, 0.6 and 0.8, the proposed inverter configuration was subjected to an R-L load and the respective numbers of output voltage level were synthesized. Fast Fourier transform analyses of the output voltage waveforms were carried out and the corresponding THD values were obtained. For a modulation index of 0.8, a THD value of 10.12% has been achieved in the output voltage waveform of the proposed inverter configuration. Comparison of the proposed inverter configuration and the classical single-phase topologies is given based on the power circuit component count. Moreover, analysis of the conduction power losses in the power semiconductor switches of the proposed inverter topology is given. To verify the performance of the proposed inverter architecture, simulations and experiments are carried out on a 2.12 kW rated prototype of the proposed inverter for an R-L load; and adequate results are presented.
引用
收藏
页码:468 / 477
页数:10
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