Network processor design for optical burst switched networks

被引：3
|
作者：
Mehrotra, P [1 ]
Baldine, I [1 ]
Stevenson, D [1 ]
Franzon, P [1 ]
机构：
[1] N Carolina State Univ, Dept Elect & Comp Engn, Raleigh, NC 27695 USA
来源：
14TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS | 2001年
关键词：
D O I：
10.1109/ASIC.2001.954715
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Scalable hardware architectures are required for optical burst switched (OBS) where future fibers may be handling 4Tbps or more. Issues investigated include centralized vs. distributed architectures, scaling issues related to performance, and the hardware impact of Just-in-Time (JIT) vs. Just-Enough-Time (JET) signaling.
引用
收藏
页码：296 / 300
页数：5
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