A low noise CMOS wideband PLL with a new AAC LC-VCO

被引：0
|
作者：
Wu, X [1 ]
Sun, W [1 ]
Chen, ZT [1 ]
Shi, LX [1 ]
机构：
[1] Natl ASIC Syst & Engn Ctr, Nanjing, Jiangsu, Peoples R China
来源：
2005 6th International Conference on ASIC Proceedings, Books 1 and 2 | 2005年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a wideband CMOS PLL frequency synthesizer with a new AAC (Auto-Amplitude Control) VCO in 0.35 in CMOS process. To get wideband VCO frequency output in relatively low RF band (400MHz-660MHz), an off-chip LC tank with a high voltage varactor is used. The new AAC module is designed to keep the output amplitude constant, hence relatively good performance. The proposed PLL is made up of two chips, one is the VCO and the other is the rest parts. The synthesizer is verified by simulation and measurement. The measured result shows that this PLL can work in a wide band and has low noise.
引用
收藏
页码：556 / 559
页数：4
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