A super-dynamic flip-flop circuit for broadband applications up to 24 Gbit/s utilizing production-level 0.2-mu m GaAs MESFETs

被引：9

作者：

Otsuji, T

Yoneyama, M

Murata, K

Sano, E

机构：

来源：

GAAS IC SYMPOSIUM - 18TH ANNUAL, TECHNICAL DIGEST 1996 | 1996年

关键词：

D O I：

10.1109/GAAS.1996.567831

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes a novel dynamic flip-flop (FF) circuit that can operate 30% faster than conventional clocked inverter-type FFs. A new wide-band clock buffer is introduced to cover the FF operation range. An 8- to 24-Gbit/s decision circuit and a 9- to 26-GHz 1/2 frequency divider were developed using production-level 0.2-mu m GaAs MESFET technology.

引用

页码：145 / 148

页数：4

共 5 条

[1] A super-dynamic flip-flop circuit for broad-band applications up to 24 Gb/s utilizing production-level 0.2-mu m GaAs MESFET's
Otsuji, T
Yoneyama, M
Murata, K
Sano, E
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (09) : 1357 - 1362
[2] A 40 Gbit/s super-dynamic decision IC using 0.15-mu m GaAs MESFETs
Murata, K
Otsuji, T
Yoneyama, M
Tokumitsu, M
1997 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS I-III: HIGH FREQUENCIES IN HIGH PLACES, 1997, : 465 - 468
[3] A new broadband buffer circuit technique and its application to a 10-Gbit/s decision circuit using production-level 0.5 μm GaAs MESFETs
Miyashita, M
Andoh, N
Yamamoto, K
Nakagawa, J
Omura, E
Aiga, M
Nakayama, Y
IEICE TRANSACTIONS ON ELECTRONICS, 1998, E81C (10): : 1627 - 1638
[4] 32Gbit/s super-dynamic decision IC using 0.13 mu m GaAs MESFETs with multilayer-interconnection structure
Otsuji, T
Murata, K
Tokumitsu, M
Sugitani, S
ELECTRONICS LETTERS, 1997, 33 (06) : 480 - 482
[5] A NOVEL HIGH-SPEED LATCHING OPERATION FLIP-FLOP (HLO-FF) CIRCUIT AND ITS APPLICATION TO A 19-GB/S DECISION CIRCUIT USING A 0.2-MU-M GAAS-MESFET
MURATA, K
OTSUJI, T
SANO, E
OHHATA, M
TOGASHI, M
SUZUKI, M
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1995, 30 (10) : 1101 - 1108

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