Fabrication and electrical characteristics of graphene-based charge-trap memory devices

被引:7
|
作者
Lee, Sejoon [1 ]
Kim, Sung Min [2 ]
Song, Emil B. [2 ]
Wang, Kang L. [2 ]
Seo, David H. [3 ]
Seo, Sunae [4 ]
机构
[1] Dongguk Univ Seoul, Quantum Funct Semicond Res Ctr, Seoul 100715, South Korea
[2] Univ Calif Los Angeles, Dept Elect Engn, Los Angeles, CA 90095 USA
[3] Samsung Elect Co Ltd, Yongin 446711, South Korea
[4] Sejong Univ, Dept Phys, Seoul 143747, South Korea
基金
新加坡国家研究基金会;
关键词
Graphene; Nonvolatile memory; Charge-trap memory; Field-effect transistor; FEW-LAYER GRAPHENE; SPECTROSCOPY; FILMS;
D O I
10.3938/jkps.61.108
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
Graphene-based non-volatile charge-trap memory devices were fabricated and characterized to investigate the implementation effect of both 2-dimensional graphene and the 3-dimensional memory structure. The single-layer-graphene (SLG) channel devices exhibit larger memory windows compared to the multi-layer-graphene (MLG) channel devices. This originates from the gate-coupling strength being larger in SLG devices than in MLG devices. Namely, the electrostatic charge screening effect becomes enhanced upon increasing the number of graphene layers; therefore, the gate tunability is reduced in MLG compared to SLG. The results suggest that SLG is more desirable for memory applications than MLG.
引用
收藏
页码:108 / 112
页数:5
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