TCAD driven process design of 0.15 μm fully-depleted SOI transistor for low power applications

被引：0
|
作者：
Miura, N [1 ]
Hayashi, H [1 ]
Komatsubara, H [1 ]
Mochizuki, M [1 ]
Matsuhashi, H [1 ]
Kajita, Y [1 ]
Fukuda, K [1 ]
机构：
[1] Oki Elect Ind Co Ltd, VLSI Res Ctr, Tokyo 1938550, Japan
来源：
SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2001 | 2001年
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We presented a TCAD-driven total design methodology of FD-SOI MOSFETs, starting from 0.35 mum/2.5V shrinking to 0.15 mum/1.5V. Jumping from 0.35 mum to 0.15 mum, two-phase experiments are performed effectively supported by exhaustive applications of TCAD local models. SOI specific consideration of SOI film thickness variations (sigma Tsoi) and floating-body effects are the key points for the TCAD driven strategy.
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页码：284 / 287
页数：4
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