Variability in 3-D Integrated Circuits

被引：8

作者：

Akopyan, Filipp ^{[1
]}

Otero, Carlos Tadeo Ortega ^{[1
]}

Fang, David ^{[1
]}

Jackson, Sandra J. ^{[1
]}

Manohar, Rajit ^{[1
]}

机构：

[1] Cornell Univ, Comp Syst Lab, Ithaca, NY 14853 USA

来源：

PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2008年

关键词：

D O I：

10.1109/CICC.2008.4672172

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In recent years, there has been a trend among digital and analog circuit designers towards three-dimensional integration. There has been some debate regarding the applicability of 3-D technology to general logic circuits, especially with regard to thermal issues. We examine process variations on the same layer, across layers, and cross-chip variations. We show how the performance of each layer of the 3-D chip varies with temperature, and demonstrate the effect of heat pipes on circuit performance.

引用

页码：659 / 662

页数：4

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