Partial-Order Reduction for GPU Model Checking

被引:13
|
作者
Neele, Thomas [1 ,2 ]
Wijs, Anton [2 ]
Bosnacki, Dragan [2 ]
van de Pol, Jaco [1 ]
机构
[1] Univ Twente, Enschede, Netherlands
[2] Eindhoven Univ Technol, Eindhoven, Netherlands
关键词
CORE;
D O I
10.1007/978-3-319-46520-3_23
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Model checking using GPUs has seen increased popularity over the last years. Because GPUs have a limited amount of memory, only small to medium-sized systems can be verified. For on-the-fly explicitstate model checking, we improve memory efficiency by applying partialorder reduction. We propose novel parallel algorithms for three practical approaches to partial-order reduction. Correctness of the algorithms is proved using a new, weaker version of the cycle proviso. Benchmarks show that our implementation achieves a reduction similar to or better than the state-of-the-art techniques for CPUs, while the amount of runtime overhead is acceptable.
引用
收藏
页码:357 / 374
页数:18
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