An extended high-voltage-gain DC-DC converter with reduced voltage stress on switches/diodes

被引:20
|
作者
Pourfarzad, Hamed [1 ]
Saremi, Mohammad [2 ]
Jalilzadeh, Tohid [3 ]
机构
[1] Univ Tehran, Ctr Excellence Electrochem, Fac Chem, Tehran, Iran
[2] Islamic Azad Univ, West Tehran Branch, Coll Tech & Engn, Dept Elect Engn, Tehran, Iran
[3] Univ Tabriz, Fac Elect & Comp Engn, Tabriz, Iran
关键词
High voltage gain; Low normalized peak voltage stress; Voltage multiplier cell; Charge-pump circuit; COUPLED INDUCTORS;
D O I
10.1007/s00202-020-01040-4
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new transformer-less boost-based DC-DC converter is suggested in this research. The voltage gain of the proposed converter is enhanced employing a charge-pump circuit (CPC) andn-stages of voltage multiplier cells (VMC). Each VMC consists of one inductor, one diode, and two capacitors. As the number of these VMC stages (n) increases, it is feasible to achieve high voltage gains with low duty cycles. Furthermore, by expandingn, a significant reduction of the normalized peak voltage stress (NPVS) of the components is possible. Due to this feature, using the MOSFET switches with low ON-state resistance and the low-rating voltage components is provided which results in diminishing the conduction and switching losses. The steady-state analysis is accomplished in details and the comparison considering other converters in the literature is presented in this manuscript. Validating of the converter performance is accomplished by implementing a laboratory prototype for the power of 300 W, input, and output voltages of 30 V and 310 V, respectively, and switching frequency of 40 kHz. Experimental results validate the mathematical analysis.
引用
收藏
页码:2435 / 2452
页数:18
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