System design validation using formal models

被引:0
|
作者
Henderson, P [1 ]
Walters, R [1 ]
机构
[1] Univ Southampton, Dept Elect & Comp Sci, Declarat Syst & Software Engn Grp, Southampton SO17 1BJ, Hants, England
关键词
D O I
10.1109/IWRSP.1999.779024
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
Formal methods are a nice idea, but the size and complexity of real systems means that they are impractical. We propose that a reasonable alternative to attempting to specify and verify the system in its entirety is to build and evaluate an abstract model(s) of aspects of the system that are perceived as important. Using a model will nor provide proof of the system, but it can help to find shortcomings and errors at an early stage. Executing the model should also give a measure of confidence in the final product. Many systems today are built from communicating components so that the task of the developers is becoming fitting these components together to form the required system. We show how a formal model can be sympathetic to this type of architecture using our tool, RolEnact and explain how this may be related to a COM implementation.
引用
收藏
页码:10 / 14
页数:5
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