Detection of deadlock potentials in multithreaded programs

被引:23
|
作者
Agarwal, R. [1 ,2 ]
Bensalem, S. [3 ,4 ]
Farchi, E. [6 ]
Havelund, K. [5 ,7 ]
Nir-Buchbinder, Y. [6 ,8 ]
Stoller, S. D. [9 ]
Ur, S. [6 ,10 ]
Wang, L. [11 ]
机构
[1] Synopsys Inc, Mountain View, CA 94043 USA
[2] Cadence Res Labs, Berkeley, CA USA
[3] Verimag & Joseph Fourier Univ, Grenoble, France
[4] SRI Int, Menlo Pk, CA USA
[5] CALTECH, Jet Prop Lab, Pasadena, CA 91109 USA
[6] IBM Res Div, Haifa Res Lab, IL-31905 Haifa, Israel
[7] LaRS, Pasadena, CA 91109 USA
[8] IBM Haifa Res Laboratory, Code Optimizat & Qual Technol Dept, Haifa, Israel
[9] SUNY Stony Brook, Stony Brook, NY 11794 USA
[10] IBM Corp, Area coverage, Armonk, NY USA
[11] Univ Wyoming, Dept Comp Sci, Laramie, WY 82071 USA
基金
美国国家航空航天局; 美国国家科学基金会;
关键词
VERIFICATION;
D O I
10.1147/JRD.2010.2060276
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Concurrent programs are well known for containing errors that are difficult to detect, reproduce, and diagnose. Deadlock is a common concurrency error, which occurs when a set of threads are blocked, due to each attempting to acquire a lock held by another. This paper presents a collection of highly scalable static and dynamic techniques for exposing potential deadlocks. The basis is a known algorithm, which, when locks are acquired in a nested fashion, captures the nesting order in a lock graph. A cycle in the graph indicates a deadlock potential. We propose three extensions to this basic algorithm to eliminate, or label as low severity, false warnings of possible deadlocks (false positives). These false positives may be due to cycles within one thread, cycles guarded by a gate lock (an enclosing lock that prevents deadlocks), and cycles involving several code fragments that cannot possibly execute in parallel. We also present a technique that combines information from multiple runs of the program into a single lock graph, to find deadlock potentials that would not be revealed by analyzing one run at a time. Finally, this paper describes the use of static analysis to automatically reduce the overhead of dynamic checking for deadlock potentials.
引用
收藏
页数:15
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