Linearity Improvement of Double Differential Pair CMOS OTA Using Quasi-Floating-Gate Technique

被引：0
|
作者：
Narayan, Shankar [1 ]
Bhadauria, Vijaya [2 ]
机构：
[1] Madhya Pradesh Power Generating Co Ltd, Sarni, MP, India
[2] Motilal Nehru Natl Inst Technol, Elect & Commun Engn Dept, Allahabad, Uttar Pradesh, India
来源：
2012 2ND INTERNATIONAL CONFERENCE ON POWER, CONTROL AND EMBEDDED SYSTEMS (ICPCES 2012) | 2012年
关键词：
D O I：
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中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
A new configuration of a linearised operational transconductor amplifier (OTA) using double differential pair with source degeneration block is proposed in this paper. Double differential structure is used to cancel out the even order harmonics. The Source degeneration block of double differential pair is implemented by "Tunable linear Quasi-Floating-Gate (QFG) transistor operating in the triode mode". Conventional quasi-floating MOS resistors are implemented using a large resistance. This large value of floating biasing resistor is implemented using MOS transistor operating in subthreshold region. The transconductor is implemented using UMC 0.18 mu m CMOS technology with 1.8 V supply voltage at room temperature (27 degrees C). The experimental results shows that Second Harmonic Distortion (HD2) of -144.9 dB for 0.5 V-pp at 40KHz and the power consumption is 527.4 mu w with 1.8V supply voltage.
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页数：4
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