High performance memory systems

被引：1
|
作者：
Wilkes, MV [1 ]
机构：
[1] Olivetti Res Ltd, Cambridge CB2 1QA, England
来源：
IEEE TRANSACTIONS ON COMPUTERS | 2001年 / 50卷 / 11期
关键词：
D O I：
10.1109/TC.2001.966488
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Page faults and cache faults are discussed in correlation to high performance memory systems. Page fault occurs when information has to be transferred from disk to main memory while cache fault occurs when information needs to be brought from main memory to cache. Cache fault arises due to memory gap because the dynamic random access memory (DRAM) used in main memory are slower than the static RAM (SRAM) used in the cache. Various techniques to eliminate this memory gap and idle time of a processor during the occurrence of a page fault are discussed.
引用
收藏
页码：1105 / 1105
页数：1
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