On-Chip Gate Electrostatic Discharge Protection Design for 900 V Power Metal Oxide Semiconductor Field Effect Transistor Using Punch-Through Diode Without Degrading Switching Loss

被引：1

作者：

Kim, Seongbin ^{[1
]}

Kyoung, Sinsu ^{[2
]}

机构：

[1] Korea Univ, Dept Elect Engn, KS013, Seoul, South Korea

[2] Powercubesemi Inc, Res & Dev, KS009, Bucheon Si, Gyeonggi Do, South Korea

来源：

JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | 2019年 / 19卷 / 10期

关键词：

On-Chip; ESD Protection; Power MOSFET; Punch-Through Diode; Gate Capacitance; ESD PROTECTION;

D O I：

10.1166/jnn.2019.17121

中图分类号：

O6 [化学];

学科分类号：

0703 ;

摘要：

In order to protect the gate oxide from electrostatic discharge (ESD) in power MOSFET, the onchip ESD protection circuits are required. Zener diode on poly silicon gate was normally used in power device because Zener diode structure was easy to merge with conditions of vertical structure without adding electrode. However, merged Zener diode can make unnecessary gate capacitance, and then switching characteristics are degraded by added capacitance. In this paper, a stacked punch-through diode (PT diode) with lower capacitance than Zener diode was designed for 900 V power MOSFET. The PT diode was consisted on doped polysilicon gate between the gate pad and the source pad. The electrical characteristics of this device was designed and analyzed by TCAD simulation and experiments. On the basis of this analysis, the stacked PT diode for ESD protection was optimized and compared with conventional Zener diode.

引用

页码：6781 / 6784

页数：4