SOI for MEMS and Advanced Packaging

被引：0
|
作者：
Muldavin, Jeremy [1 ]
Bozler, Carl [1 ]
Yost, Donna [1 ]
Chen, Chenson [1 ]
Wyatt, Peter [1 ]
机构：
[1] MIT, Lincoln Lab, Lexington, MA 02420 USA
来源：
IEEE INTERNATIONAL SOI CONFERENCE | 2012年
关键词：
RF MEMS; 3DIC; packaging; flexible electronics; WAFER;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Silicon on Insulator (SOI) Technologies offer many advantages for the fabrication and advanced packaging of MEMS and IC devices and systems. The buried oxide provides an excellent etch stop and the silicon layers on top can be selected for the exact thickness, crystal orientation, and purity for the required application. These properties are exploited for the fabrication and packaging of MEMS devices as well as for 3D integration of SOI CMOS and flexible electronics. Particular examples from work done at MIT Lincoln Laboratory over the last 10 years will be included.
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页数：2
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