Design of Low-Power and High Slew-rate Error Amplifier for Fast Transient CMOS Buck Converters

被引：0

作者：

Liu, Pang-Jung ^{[1
]}

Hsu, Yu-Chi ^{[1
]}

机构：

[1] Natl Taipei Univ Technol, Dept Elect Engn, Taipei, Taiwan

来源：

2017 IEEE 3RD INTERNATIONAL FUTURE ENERGY ELECTRONICS CONFERENCE AND ECCE ASIA (IFEEC 2017-ECCE ASIA) | 2017年

关键词：

dc-dc converter; error amplifier; transient response; slew rate; DC-DC CONVERTER;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The voltage boosting control (VBC) is presented to achieve low-power and high slew-rate error amplifier for enhancing the load transient response of dc-dc converters. The VBC is employed to increase/decrease the gate voltages of the output-stage transistors of the error amplifier, leading to large current driving capability with simple circuitry during transient. In addition, the accelerative scheme of the error amplifier is switched off in steady state for power saving. A buck converter with the VBC method is designed with 0.35-mu m 2P4M CMOS technology. Compared without the VBC, the experimental results show that the output voltage variation and recovery time of the buck converter with the VBC are enhanced by over two times and ten times, respectively, for load current change between 50 mA to 500 mA.

引用

页码：942 / 946

页数：5

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