Extended counting ADC for 32-channel neural recording headstage for small animals

被引：0
|
作者：
Yun, Xiao [1 ]
Stanacevic, Milutin [1 ]
机构：
[1] SUNY Stony Brook, Dept Elect & Comp Engn, Stony Brook, NY 11794 USA
来源：
PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 | 2008年
关键词：
D O I：
10.1109/ISCAS.2008.4541966
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Extended counting analog-to-digital converter (ECADC) combines the accuracy of delta-sigma modulation and the speed of algorithmic conversion. This conversion architecture is shown to be useful in biomedical applications, where both resolution and speed are demanded. This work presents a design of ECADC for 32 neural recording channels. Several power optimizing methods are described. The designed converter achieves a resolution of 13 bits and a sampling frequency of 512 kHz. With 3.3V supply, the total power consumption is estimated to be 7 mW. The whole system including 32 neural recording channels is fitted in an area of 3mm x 3mm in 0.5 mu m CMOS process.
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页码：2510 / 2513
页数：4
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